Monolithic ICs generally comprise a number of transistors, such as metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated over a planar substrate, such as a silicon wafer.
ICs often include at least one antifuse. An antifuse is an electrical device that starts with a high resistance and is designed to permanently create a conductive path when the voltage across the device exceeds a threshold level. With transistor dimension scaling from one generation to another, it is advantageous to scale down the antifuse bit cell size, as well as the antifuse program voltage.
Conventional antifuse designs often employ a MOS transistor-based structure, as depicted in FIG. 1. Antifuse 101 employs a transistor gate terminal 130 and a source/drain contacts 141, 142. As such, the antifuse circuit path passes through a gate dielectric 120, a doped semiconductor well 108, and heavily doped semiconductor source/drain 110. Formation of the conductive path during a programming operation entails permanently breaking down the gate dielectric 120, changing the resistance between gate terminal 130 and source/drain contacts 141, 142. Current levels in the antifuse post-breakdown are then limited to the conductive state resistance. For antifuse 101, the resistance in the conductive state includes the resistance of the intervening semiconductor regions 108, 110 and associated metal-semiconductor contact, which results in a limited On/Off antifuse ratio. Furthermore, conventional antifuse designs that utilize a breakdown of a transistor structure require a bit cell area sufficient to host both the MOS transistor-based antifuse and at least one other MOS transistor used for programming the antifuse.
Antifuse architectures and associated fabrication techniques with lower conductive state resistance, and/or smaller bit cell areas are advantageous.